Previous Workshops: 2001 | 2002 | 2003 | 2004 | 2005 | 2006 | 2007
Wafer Disposition at E-Test via Engineered Rules
Jerry Secrest, Secrest Research
A new capability has been added on top of classical failure analysis at E-test. The new capability is to add a set of rules, developed by a combination of historical results and engineering input that dispositions Wafer-lots and Wafers.
This paper will show the difference between conventional and automated Lot/Wafer disposition at E-test, disposition rule development and entry, and sources for data on which disposition decisions are made. The disposition rules can be simple such as setting distribution limits or complex by including data from several sources. For example, Wafer Level Reliability, WLR, test data results may be used with conventional E-test parameter data, and Alarm logs to improve disposition accuracy.
This paper will also show how engineers can update rules as new operating information is available. The disposition rules can grow over time and experience into a knowledge base that can be used by other engineers and never lost.
Jerry Secrest is a technical consultant to the semiconductor industry specializing in Die Trace, KGD manufacturing methods, parameter prediction, and automation. He has authored handbooks on SECS Communications and Die trace mthods. Prior to consulting he held engineering and operations management positions.