3D Die Level Stacking and KGD Interdependence

Marc Robinson, Vertical Circuits, Inc.

Vertical Circuits (VCI) has been a pioneer in stacked die packages for over 10 years. As high density, high performance electronic products and markets have evolved over this period, advancing market needs and technology capabilities have driven VCI to develop an advanced die stacking technology for high speed, low profile, mainstream commercial applications. As speeds have increased, package designers have faced signal integrity, thermal, and physical issues. Initially applied to memory, die level stacking for mixed die applications is expected to grow significantly, driven by cell phone and other portable applications. This presentation will review physical, thermal, signal integrity, and market issues VCI has faced developing high performance die stacking technology and highlight the role KGD issues have played in the development of VCI’s products and technology, past, present, and future.

Mr. Robinson is Vice President, CTO and Business Development, for Vertical Circuits Inc. He focuses on new products and business development, playing a key role in shaping the development and commercialization of VCI’s stacking technology.

Mr. Robinson joined Cubic Memory, the predecessor to VCI, in 1996, as Vice President of Engineering and Operations, taking his current role as VCI’s CTO in 2001. Before joining VCI, Mr. Robinson served as Vice President, Technology Development and Quality for Sierra Semiconductor Corporation. Prior to Sierra, he was Vice President of Engineering, and Vice President of TQM and Quality at GEC Plessey Semiconductors, where he focused on product development, design quality, and worldwide TQM initiatives. Prior to GEC Plessey, he served as a Business Unit Director at International Microelectronics Products (IMP).

Mr. Robinson holds a BS in Physics from the Cooper Union, and an MS in Physics from Franklin & Marshall.